The present invention relates to the field of waveform synthesis or signal generation, and more particularly, to a data structure for use in waveform synthesis and a method and apparatus for synthesizing a waveform using this structure.
Conventionally, in the field of video processing and the like, a variety of signal generators are known for generating a test signal. For example, a video signal reproducing apparatus disclosed in Laid-open Japanese Patent Application No. 6-121279 comprises a ROM for storing only level data of a sloping portion (a transient region and a neighboring portion therearound) of synchronization signals to be generated; and a timing control circuit for generating a variety of timing signals. The video signal reproducing apparatus is configured to generate a basic waveform for a synchronization signal using the level data and one timing signal, and modify the basic waveform using other timing signals to generate other synchronization signals having several waveforms. The video signal reproducing apparatus only needs a small capacity of storage because less data is required for waveforms. However, in the configuration described above, timing data other than level data is stored in the timing control circuit separate from the ROM for storing level data, so that the level data for generating waveforms is separated from the timing control data and stored independently of the timing control data.
A high vision video signal generator circuit disclosed in Laid-open Japanese Patent Application No. 5-30377 comprises ROM1-ROM5 for storing waveforms of synchronization signals in five types of horizontal periods; and ROM 6 for storing an order in which ROM1-ROM5 are selected in order to generate a synchronization signal for one frame. Like the aforementioned video signal reproducing apparatus, the high vision video signal generator circuit separately stores waveform value data and timing control data which are separated from each other.
Further, conventionally, when synchronization signal waveform data is processed at a high data rate, a plurality of memories having a reading speed lower than the data rate, if employed, is connected in parallel to achieve a memory reading speed corresponding to the data rate. Specifically, data from a plurality of memories connected in parallel are multiplexed to generate a waveform of a synchronization signal. For this configuration, a larger number of memories is required to generate a synchronization signal at a higher data rate.